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101 lines
2.9 KiB
C
Executable File
101 lines
2.9 KiB
C
Executable File
/**
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* Jingga
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*
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* @copyright Jingga
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* @license OMS License 2.0
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* @version 1.0.0
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* @link https://jingga.app
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*/
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#ifndef COMS_ARCHITECTURE_CPU_INFO_H
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#define COMS_ARCHITECTURE_CPU_INFO_H
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#include "../stdlib/Types.h"
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// @todo We don't care about a lot of features, consider to remove them if we can get either below 32bit
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// or if we eventually overflow 64 bit
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enum CPUFeature : uint64 {
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CPU_FEATURE_SSE3 = 1ULL << 0,
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CPU_FEATURE_PCLMULQDQ = 1ULL << 1,
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CPU_FEATURE_MONITOR = 1ULL << 2,
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CPU_FEATURE_SSSE3 = 1ULL << 3,
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CPU_FEATURE_FMA = 1ULL << 4,
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CPU_FEATURE_CMPXCHG16B = 1ULL << 5,
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CPU_FEATURE_SSE41 = 1ULL << 6,
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CPU_FEATURE_SSE42 = 1ULL << 7,
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CPU_FEATURE_MOVBE = 1ULL << 8,
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CPU_FEATURE_POPCNT = 1ULL << 9,
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CPU_FEATURE_AES = 1ULL << 10,
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CPU_FEATURE_XSAVE = 1ULL << 11,
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CPU_FEATURE_OSXSAVE = 1ULL << 12,
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CPU_FEATURE_AVX = 1ULL << 13,
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CPU_FEATURE_F16C = 1ULL << 14,
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CPU_FEATURE_RDRAND = 1ULL << 15,
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CPU_FEATURE_MSR = 1ULL << 16,
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CPU_FEATURE_CX8 = 1ULL << 17,
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CPU_FEATURE_SEP = 1ULL << 18,
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CPU_FEATURE_CMOV = 1ULL << 19,
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CPU_FEATURE_CLFSH = 1ULL << 20,
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CPU_FEATURE_MMX = 1ULL << 21,
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CPU_FEATURE_FXSR = 1ULL << 22,
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CPU_FEATURE_SSE = 1ULL << 23,
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CPU_FEATURE_SSE2 = 1ULL << 24,
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CPU_FEATURE_AVX2 = 1ULL << 25,
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CPU_FEATURE_BMI1 = 1ULL << 26,
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CPU_FEATURE_BMI2 = 1ULL << 27,
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CPU_FEATURE_ERMS = 1ULL << 28,
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CPU_FEATURE_INVPCID = 1ULL << 29,
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CPU_FEATURE_RDSEED = 1ULL << 30,
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CPU_FEATURE_ADX = 1ULL << 31,
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CPU_FEATURE_SHA = 1ULL << 32,
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CPU_FEATURE_PREFETCHWT1 = 1ULL << 33,
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CPU_FEATURE_LAHF = 1ULL << 34,
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CPU_FEATURE_LZCNT = 1ULL << 35,
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CPU_FEATURE_ABM = 1ULL << 36,
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CPU_FEATURE_SSE4a = 1ULL << 37,
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CPU_FEATURE_XOP = 1ULL << 38,
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CPU_FEATURE_TBM = 1ULL << 39,
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CPU_FEATURE_SYSCALL = 1ULL << 40,
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CPU_FEATURE_MMEXT = 1ULL << 41,
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CPU_FEATURE_RDTSCP = 1ULL << 42,
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CPU_FEATURE_3DNOWEXT = 1ULL << 43,
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CPU_FEATURE_3DNOW = 1ULL << 44,
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CPU_FEATURE_AVX512F = 1ULL << 45,
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CPU_FEATURE_AVX512PF = 1ULL << 46,
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CPU_FEATURE_AVX512ER = 1ULL << 47,
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CPU_FEATURE_AVX512CD = 1ULL << 48,
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CPU_FEATURE_ASIMD_ARM = 1ULL << 49,
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CPU_FEATURE_ATOMICS_ARM = 1ULL << 50,
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CPU_FEATURE_PMULL_ARM = 1ULL << 51,
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CPU_FEATURE_SVEPMULL_ARM = 1ULL << 52,
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CPU_FEATURE_NEON_ARM = 1ULL << 53,
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CPU_FEATURE_SVE_ARM = 1ULL << 54,
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CPU_FEATURE_SVE2_ARM = 1ULL << 55,
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CPU_FEATURE_AES_ARM = 1ULL << 56,
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CPU_FEATURE_SHA1_ARM = 1ULL << 57,
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CPU_FEATURE_SHA2_ARM = 1ULL << 58,
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CPU_FEATURE_CRC32_ARM = 1ULL << 59,
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};
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struct CpuCacheInfo {
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uint32 size;
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uint32 sets;
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byte level;
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byte ways;
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byte partitions;
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uint16 line_size;
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};
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struct CpuInfo {
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char vendor[13];
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char brand[49];
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byte model;
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byte family;
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int16 core_count;
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int32 mhz;
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uint32 page_size;
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CpuCacheInfo cache[4];
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uint64 features;
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};
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#endif |